Authors: Tejas Nanasaheb Rahane, Sakshi Vikram Shelke, Shravani Sambhaji Hinge
Abstract: Edge detection is an important operation in digital image processing because it identifies boundaries where image intensity changes sharply. These boundaries provide useful information for object detection, shape analysis, machine vision and robotics. This paper presents a proposed FPGA-based image edge detection system using the Sobel operator. The input image is acquired from a camera or stored image source and is converted to a suitable grayscale pixel stream. A 3×3 sliding window is formed with line buffers and registers. The Sobel horizontal and vertical kernels calculate gradient components, which are combined and compared with a threshold to generate an edge image. FPGA parallelism and reconfigurable logic can support high-throughput, low-latency processing for suitable designs. The design can be described using Verilog HDL or VHDL and developed with tools such as AMD Xilinx Vivado or Intel Quartus Prime. Performance must be verified on the selected board using measured timing, resource utilization and image-quality results.
DOI: https://doi.org/10.5281/zenodo.23595201
