Authors: Kailash Kumar Mahto
Abstract: Recent advancements in power electronics have provided a strong platform for the development of various multilevel inverter (MLI) topologies. These MLI configurations offer several notable advantages, such as high-quality staircase sinusoidal output voltage, a reduced number of power switches, and the elimination of external filters. In this paper, a symmetrical sourced base multilevel inverter topology to generate 11-level of output is proposed to minimize the number of inverter components while achieving an enhanced voltage-step generation. The proposed structure is capable of producing a high-step, staircase-type of 11-level voltage output waveform that closely approximates a sinusoidal voltage without increasing the number of power semiconductor switches. A Carrier-Based Sinusoidal Pulse Width Modulation (CB-PWM) technique is implemented at a switching frequency of 3 kHz to control the inverter operation. The simulation is carried out using MATLAB/Simulink R2019b environment. The working principle of the proposed multilevel inverter (MLI) is explained in detail. This research focuses on the design of a novel single-phase multilevel inverter with a reduced component count. The proposed MLI configuration is structured to generate the maximum possible number of voltage levels in the output AC waveform while utilizing fewer power electronic devices. Furthermore, the output characteristics of the proposed inverter are analyzed for modulation index 1 for an RL load to examine its dynamic behavior and voltage-step generation capability.
DOI: https://doi.org/10.5281/zenodo.18846772
