Authors: Randive Abhijeet Santosh, Sadaphal Harshal Ravindra, Shinde Prashant Shantaram, Prof. S. E. Shinde, Prof. M. S. Nalawade, Dr. V. M. Dhede
Abstract: Artificial intelligence workloads are dominated by multiply-and-accumulate operations on very large weight matrices. In conventional processors these weights must be moved repeatedly between memory and the arithmetic units, and this data movement, rather than the arithmetic itself, consumes most of the energy and time. Memristor-based in-memory computing (IMC) addresses this limitation by performing computation inside the memory array. A memristor is a two-terminal resistive switching device whose conductance can be programmed and retained, so it can store a weight. When memristors are arranged in a crossbar, Ohm's law and Kirchhoff's current law cause the column currents to equal the product of an input voltage vector and the conductance matrix, so a complete vector–matrix multiplication is obtained in a single analog step. This review explains the memristor concept and its physical realisations, the working principle of crossbar arrays, and the peripheral circuits and system architecture needed to build an accelerator. Representative device-level and system-level studies are compared. The benefits for AI inference and training are assessed against non-idealities such as device variability, limited precision, conductance drift, wire resistance and the cost of analog-to-digital conversion. Applications and research directions are identified.
DOI: https://doi.org/10.5281/zenodo.23881928
